-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "12/26/2021 13:46:38"

-- 
-- Device: Altera EP4CGX15BF14C6 Package FBGA169
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIV;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIV.CYCLONEIV_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	filter IS
    PORT (
	clk : IN std_logic;
	reset : IN std_logic;
	start : IN std_logic;
	data : IN std_logic_vector(7 DOWNTO 0);
	fil_output : BUFFER std_logic_vector(7 DOWNTO 0);
	error : BUFFER std_logic_vector(7 DOWNTO 0)
	);
END filter;

-- Design Ports Information
-- fil_output[0]	=>  Location: PIN_D12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[1]	=>  Location: PIN_C13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[2]	=>  Location: PIN_F9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[3]	=>  Location: PIN_D11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[4]	=>  Location: PIN_H12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[5]	=>  Location: PIN_D13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[6]	=>  Location: PIN_E10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- fil_output[7]	=>  Location: PIN_D10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[0]	=>  Location: PIN_M13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[1]	=>  Location: PIN_F11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[2]	=>  Location: PIN_G10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[3]	=>  Location: PIN_F10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[4]	=>  Location: PIN_G9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[5]	=>  Location: PIN_H10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[6]	=>  Location: PIN_E13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- error[7]	=>  Location: PIN_A13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- start	=>  Location: PIN_K12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_J7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- reset	=>  Location: PIN_J6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[2]	=>  Location: PIN_K13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[7]	=>  Location: PIN_J13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[6]	=>  Location: PIN_L13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[5]	=>  Location: PIN_L12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[4]	=>  Location: PIN_K10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[3]	=>  Location: PIN_N13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[1]	=>  Location: PIN_C12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- data[0]	=>  Location: PIN_K11,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF filter IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_reset : std_logic;
SIGNAL ww_start : std_logic;
SIGNAL ww_data : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_fil_output : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_error : std_logic_vector(7 DOWNTO 0);
SIGNAL \reset~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \fil_output[0]~output_o\ : std_logic;
SIGNAL \fil_output[1]~output_o\ : std_logic;
SIGNAL \fil_output[2]~output_o\ : std_logic;
SIGNAL \fil_output[3]~output_o\ : std_logic;
SIGNAL \fil_output[4]~output_o\ : std_logic;
SIGNAL \fil_output[5]~output_o\ : std_logic;
SIGNAL \fil_output[6]~output_o\ : std_logic;
SIGNAL \fil_output[7]~output_o\ : std_logic;
SIGNAL \error[0]~output_o\ : std_logic;
SIGNAL \error[1]~output_o\ : std_logic;
SIGNAL \error[2]~output_o\ : std_logic;
SIGNAL \error[3]~output_o\ : std_logic;
SIGNAL \error[4]~output_o\ : std_logic;
SIGNAL \error[5]~output_o\ : std_logic;
SIGNAL \error[6]~output_o\ : std_logic;
SIGNAL \error[7]~output_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \start~input_o\ : std_logic;
SIGNAL \state_ns.idle1~0_combout\ : std_logic;
SIGNAL \reset~input_o\ : std_logic;
SIGNAL \reset~inputclkctrl_outclk\ : std_logic;
SIGNAL \state_ps.idle1~q\ : std_logic;
SIGNAL \state_ps.idle2~0_combout\ : std_logic;
SIGNAL \state_ps.idle2~q\ : std_logic;
SIGNAL \state_ps.op~0_combout\ : std_logic;
SIGNAL \state_ps.op~q\ : std_logic;
SIGNAL \data[1]~input_o\ : std_logic;
SIGNAL \r2_ns[1]~6_combout\ : std_logic;
SIGNAL \data[7]~input_o\ : std_logic;
SIGNAL \r2_ns[7]~1_combout\ : std_logic;
SIGNAL \Selector0~0_combout\ : std_logic;
SIGNAL \data[6]~input_o\ : std_logic;
SIGNAL \r2_ns[6]~2_combout\ : std_logic;
SIGNAL \Selector1~0_combout\ : std_logic;
SIGNAL \data[5]~input_o\ : std_logic;
SIGNAL \r2_ns[5]~3_combout\ : std_logic;
SIGNAL \Selector2~0_combout\ : std_logic;
SIGNAL \data[4]~input_o\ : std_logic;
SIGNAL \r2_ns[4]~4_combout\ : std_logic;
SIGNAL \Selector3~0_combout\ : std_logic;
SIGNAL \data[3]~input_o\ : std_logic;
SIGNAL \r2_ns[3]~5_combout\ : std_logic;
SIGNAL \Selector4~0_combout\ : std_logic;
SIGNAL \data[2]~input_o\ : std_logic;
SIGNAL \r2_ns[2]~0_combout\ : std_logic;
SIGNAL \Selector5~0_combout\ : std_logic;
SIGNAL \Selector6~0_combout\ : std_logic;
SIGNAL \data[0]~input_o\ : std_logic;
SIGNAL \r2_ns[0]~7_combout\ : std_logic;
SIGNAL \Selector7~0_combout\ : std_logic;
SIGNAL \LessThan0~1_cout\ : std_logic;
SIGNAL \LessThan0~3_cout\ : std_logic;
SIGNAL \LessThan0~5_cout\ : std_logic;
SIGNAL \LessThan0~7_cout\ : std_logic;
SIGNAL \LessThan0~9_cout\ : std_logic;
SIGNAL \LessThan0~11_cout\ : std_logic;
SIGNAL \LessThan0~13_cout\ : std_logic;
SIGNAL \LessThan0~14_combout\ : std_logic;
SIGNAL \max~2_combout\ : std_logic;
SIGNAL \max~1_combout\ : std_logic;
SIGNAL \Add0~1_cout\ : std_logic;
SIGNAL \Add0~2_combout\ : std_logic;
SIGNAL \min~1_combout\ : std_logic;
SIGNAL \min~2_combout\ : std_logic;
SIGNAL \Add1~1_cout\ : std_logic;
SIGNAL \Add1~2_combout\ : std_logic;
SIGNAL \min~0_combout\ : std_logic;
SIGNAL \max~0_combout\ : std_logic;
SIGNAL \Add0~3\ : std_logic;
SIGNAL \Add0~4_combout\ : std_logic;
SIGNAL \Add1~3\ : std_logic;
SIGNAL \Add1~4_combout\ : std_logic;
SIGNAL \Add2~0_combout\ : std_logic;
SIGNAL \fil_output~1_combout\ : std_logic;
SIGNAL \max~3_combout\ : std_logic;
SIGNAL \Add0~5\ : std_logic;
SIGNAL \Add0~6_combout\ : std_logic;
SIGNAL \min~3_combout\ : std_logic;
SIGNAL \Add1~5\ : std_logic;
SIGNAL \Add1~6_combout\ : std_logic;
SIGNAL \Add2~1\ : std_logic;
SIGNAL \Add2~2_combout\ : std_logic;
SIGNAL \fil_output~2_combout\ : std_logic;
SIGNAL \max~4_combout\ : std_logic;
SIGNAL \Add0~7\ : std_logic;
SIGNAL \Add0~8_combout\ : std_logic;
SIGNAL \min~4_combout\ : std_logic;
SIGNAL \Add1~7\ : std_logic;
SIGNAL \Add1~8_combout\ : std_logic;
SIGNAL \Add2~3\ : std_logic;
SIGNAL \Add2~4_combout\ : std_logic;
SIGNAL \fil_output~3_combout\ : std_logic;
SIGNAL \max~5_combout\ : std_logic;
SIGNAL \Add0~9\ : std_logic;
SIGNAL \Add0~10_combout\ : std_logic;
SIGNAL \min~5_combout\ : std_logic;
SIGNAL \Add1~9\ : std_logic;
SIGNAL \Add1~10_combout\ : std_logic;
SIGNAL \Add2~5\ : std_logic;
SIGNAL \Add2~6_combout\ : std_logic;
SIGNAL \fil_output~4_combout\ : std_logic;
SIGNAL \min~6_combout\ : std_logic;
SIGNAL \max~6_combout\ : std_logic;
SIGNAL \Add0~11\ : std_logic;
SIGNAL \Add0~12_combout\ : std_logic;
SIGNAL \Add1~11\ : std_logic;
SIGNAL \Add1~12_combout\ : std_logic;
SIGNAL \Add2~7\ : std_logic;
SIGNAL \Add2~8_combout\ : std_logic;
SIGNAL \fil_output~5_combout\ : std_logic;
SIGNAL \min~7_combout\ : std_logic;
SIGNAL \max~7_combout\ : std_logic;
SIGNAL \Add0~13\ : std_logic;
SIGNAL \Add0~14_combout\ : std_logic;
SIGNAL \Add1~13\ : std_logic;
SIGNAL \Add1~14_combout\ : std_logic;
SIGNAL \Add2~9\ : std_logic;
SIGNAL \Add2~10_combout\ : std_logic;
SIGNAL \fil_output~6_combout\ : std_logic;
SIGNAL \Add0~15\ : std_logic;
SIGNAL \Add0~16_combout\ : std_logic;
SIGNAL \Add1~15\ : std_logic;
SIGNAL \Add1~16_combout\ : std_logic;
SIGNAL \Add2~11\ : std_logic;
SIGNAL \Add2~12_combout\ : std_logic;
SIGNAL \fil_output~7_combout\ : std_logic;
SIGNAL \Add0~17\ : std_logic;
SIGNAL \Add0~18_combout\ : std_logic;
SIGNAL \Add1~17\ : std_logic;
SIGNAL \Add1~18_combout\ : std_logic;
SIGNAL \Add2~13\ : std_logic;
SIGNAL \Add2~14_combout\ : std_logic;
SIGNAL \fil_output~8_combout\ : std_logic;
SIGNAL \Add3~0_combout\ : std_logic;
SIGNAL \Add5~0_combout\ : std_logic;
SIGNAL \Add3~1\ : std_logic;
SIGNAL \Add3~2_combout\ : std_logic;
SIGNAL \Add5~2_cout\ : std_logic;
SIGNAL \Add5~3_combout\ : std_logic;
SIGNAL \Add3~3\ : std_logic;
SIGNAL \Add3~5\ : std_logic;
SIGNAL \Add3~7\ : std_logic;
SIGNAL \Add3~9\ : std_logic;
SIGNAL \Add3~11\ : std_logic;
SIGNAL \Add3~13\ : std_logic;
SIGNAL \Add3~15\ : std_logic;
SIGNAL \Add3~16_combout\ : std_logic;
SIGNAL \Add3~14_combout\ : std_logic;
SIGNAL \Add3~12_combout\ : std_logic;
SIGNAL \Add3~10_combout\ : std_logic;
SIGNAL \Add3~8_combout\ : std_logic;
SIGNAL \Add3~6_combout\ : std_logic;
SIGNAL \Add3~4_combout\ : std_logic;
SIGNAL \LessThan1~1_cout\ : std_logic;
SIGNAL \LessThan1~3_cout\ : std_logic;
SIGNAL \LessThan1~5_cout\ : std_logic;
SIGNAL \LessThan1~7_cout\ : std_logic;
SIGNAL \LessThan1~9_cout\ : std_logic;
SIGNAL \LessThan1~11_cout\ : std_logic;
SIGNAL \LessThan1~13_cout\ : std_logic;
SIGNAL \LessThan1~15_cout\ : std_logic;
SIGNAL \LessThan1~16_combout\ : std_logic;
SIGNAL \Add4~0_combout\ : std_logic;
SIGNAL \Add5~5_combout\ : std_logic;
SIGNAL \Add5~4\ : std_logic;
SIGNAL \Add5~6_combout\ : std_logic;
SIGNAL \Add4~1\ : std_logic;
SIGNAL \Add4~2_combout\ : std_logic;
SIGNAL \Add5~8_combout\ : std_logic;
SIGNAL \Add4~3\ : std_logic;
SIGNAL \Add4~4_combout\ : std_logic;
SIGNAL \Add5~7\ : std_logic;
SIGNAL \Add5~9_combout\ : std_logic;
SIGNAL \Add5~11_combout\ : std_logic;
SIGNAL \Add5~10\ : std_logic;
SIGNAL \Add5~12_combout\ : std_logic;
SIGNAL \Add4~5\ : std_logic;
SIGNAL \Add4~6_combout\ : std_logic;
SIGNAL \Add5~14_combout\ : std_logic;
SIGNAL \Add5~13\ : std_logic;
SIGNAL \Add5~15_combout\ : std_logic;
SIGNAL \Add4~7\ : std_logic;
SIGNAL \Add4~8_combout\ : std_logic;
SIGNAL \Add5~17_combout\ : std_logic;
SIGNAL \Add5~16\ : std_logic;
SIGNAL \Add5~18_combout\ : std_logic;
SIGNAL \Add4~9\ : std_logic;
SIGNAL \Add4~10_combout\ : std_logic;
SIGNAL \Add5~20_combout\ : std_logic;
SIGNAL r2_ps : std_logic_vector(7 DOWNTO 0);
SIGNAL r1_ps : std_logic_vector(7 DOWNTO 0);
SIGNAL \ALT_INV_reset~inputclkctrl_outclk\ : std_logic;
SIGNAL \ALT_INV_state_ps.idle2~q\ : std_logic;

BEGIN

ww_clk <= clk;
ww_reset <= reset;
ww_start <= start;
ww_data <= data;
fil_output <= ww_fil_output;
error <= ww_error;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\reset~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \reset~input_o\);

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);
\ALT_INV_reset~inputclkctrl_outclk\ <= NOT \reset~inputclkctrl_outclk\;
\ALT_INV_state_ps.idle2~q\ <= NOT \state_ps.idle2~q\;

-- Location: IOOBUF_X33_Y28_N9
\fil_output[0]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~1_combout\,
	devoe => ww_devoe,
	o => \fil_output[0]~output_o\);

-- Location: IOOBUF_X29_Y31_N2
\fil_output[1]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~2_combout\,
	devoe => ww_devoe,
	o => \fil_output[1]~output_o\);

-- Location: IOOBUF_X33_Y25_N2
\fil_output[2]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~3_combout\,
	devoe => ww_devoe,
	o => \fil_output[2]~output_o\);

-- Location: IOOBUF_X33_Y28_N2
\fil_output[3]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~4_combout\,
	devoe => ww_devoe,
	o => \fil_output[3]~output_o\);

-- Location: IOOBUF_X33_Y14_N9
\fil_output[4]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~5_combout\,
	devoe => ww_devoe,
	o => \fil_output[4]~output_o\);

-- Location: IOOBUF_X29_Y31_N9
\fil_output[5]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~6_combout\,
	devoe => ww_devoe,
	o => \fil_output[5]~output_o\);

-- Location: IOOBUF_X33_Y27_N2
\fil_output[6]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~7_combout\,
	devoe => ww_devoe,
	o => \fil_output[6]~output_o\);

-- Location: IOOBUF_X33_Y27_N9
\fil_output[7]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \fil_output~8_combout\,
	devoe => ww_devoe,
	o => \fil_output[7]~output_o\);

-- Location: IOOBUF_X33_Y10_N2
\error[0]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~0_combout\,
	devoe => ww_devoe,
	o => \error[0]~output_o\);

-- Location: IOOBUF_X33_Y24_N9
\error[1]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~5_combout\,
	devoe => ww_devoe,
	o => \error[1]~output_o\);

-- Location: IOOBUF_X33_Y22_N9
\error[2]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~8_combout\,
	devoe => ww_devoe,
	o => \error[2]~output_o\);

-- Location: IOOBUF_X33_Y24_N2
\error[3]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~11_combout\,
	devoe => ww_devoe,
	o => \error[3]~output_o\);

-- Location: IOOBUF_X33_Y22_N2
\error[4]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~14_combout\,
	devoe => ww_devoe,
	o => \error[4]~output_o\);

-- Location: IOOBUF_X33_Y14_N2
\error[5]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~17_combout\,
	devoe => ww_devoe,
	o => \error[5]~output_o\);

-- Location: IOOBUF_X33_Y25_N9
\error[6]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \Add5~20_combout\,
	devoe => ww_devoe,
	o => \error[6]~output_o\);

-- Location: IOOBUF_X26_Y31_N2
\error[7]~output\ : cycloneiv_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \error[7]~output_o\);

-- Location: IOIBUF_X16_Y0_N15
\clk~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G17
\clk~inputclkctrl\ : cycloneiv_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: IOIBUF_X33_Y11_N8
\start~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_start,
	o => \start~input_o\);

-- Location: LCCOMB_X31_Y15_N22
\state_ns.idle1~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \state_ns.idle1~0_combout\ = (\start~input_o\) # (!\state_ps.idle2~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \start~input_o\,
	datad => \state_ps.idle2~q\,
	combout => \state_ns.idle1~0_combout\);

-- Location: IOIBUF_X16_Y0_N22
\reset~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_reset,
	o => \reset~input_o\);

-- Location: CLKCTRL_G19
\reset~inputclkctrl\ : cycloneiv_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \reset~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \reset~inputclkctrl_outclk\);

-- Location: FF_X31_Y15_N23
\state_ps.idle1\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \state_ns.idle1~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \state_ps.idle1~q\);

-- Location: LCCOMB_X31_Y15_N28
\state_ps.idle2~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \state_ps.idle2~0_combout\ = !\state_ps.idle1~q\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	combout => \state_ps.idle2~0_combout\);

-- Location: FF_X31_Y15_N29
\state_ps.idle2\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \state_ps.idle2~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \state_ps.idle2~q\);

-- Location: LCCOMB_X30_Y15_N0
\state_ps.op~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \state_ps.op~0_combout\ = (\state_ps.op~q\) # ((\start~input_o\ & \state_ps.idle2~q\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \start~input_o\,
	datac => \state_ps.op~q\,
	datad => \state_ps.idle2~q\,
	combout => \state_ps.op~0_combout\);

-- Location: FF_X30_Y15_N1
\state_ps.op\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \state_ps.op~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \state_ps.op~q\);

-- Location: IOIBUF_X31_Y31_N8
\data[1]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(1),
	o => \data[1]~input_o\);

-- Location: LCCOMB_X30_Y15_N4
\r2_ns[1]~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[1]~6_combout\ = (\data[1]~input_o\ & \state_ps.idle1~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \data[1]~input_o\,
	datad => \state_ps.idle1~q\,
	combout => \r2_ns[1]~6_combout\);

-- Location: FF_X30_Y15_N5
\r2_ps[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[1]~6_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(1));

-- Location: IOIBUF_X33_Y15_N8
\data[7]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(7),
	o => \data[7]~input_o\);

-- Location: LCCOMB_X31_Y15_N20
\r2_ns[7]~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[7]~1_combout\ = (\data[7]~input_o\ & \state_ps.idle1~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100000011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \data[7]~input_o\,
	datac => \state_ps.idle1~q\,
	combout => \r2_ns[7]~1_combout\);

-- Location: FF_X31_Y15_N21
\r2_ps[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[7]~1_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(7));

-- Location: LCCOMB_X31_Y15_N26
\Selector0~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector0~0_combout\ = (\state_ps.op~q\ & ((r2_ps(7)))) # (!\state_ps.op~q\ & (\data[7]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \data[7]~input_o\,
	datac => \state_ps.op~q\,
	datad => r2_ps(7),
	combout => \Selector0~0_combout\);

-- Location: FF_X31_Y15_N27
\r1_ps[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector0~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(7));

-- Location: IOIBUF_X33_Y12_N8
\data[6]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(6),
	o => \data[6]~input_o\);

-- Location: LCCOMB_X31_Y15_N0
\r2_ns[6]~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[6]~2_combout\ = (\state_ps.idle1~q\ & \data[6]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	datad => \data[6]~input_o\,
	combout => \r2_ns[6]~2_combout\);

-- Location: FF_X31_Y15_N1
\r2_ps[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[6]~2_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(6));

-- Location: LCCOMB_X31_Y15_N6
\Selector1~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector1~0_combout\ = (\state_ps.op~q\ & ((r2_ps(6)))) # (!\state_ps.op~q\ & (\data[6]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101011001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \data[6]~input_o\,
	datab => r2_ps(6),
	datac => \state_ps.op~q\,
	combout => \Selector1~0_combout\);

-- Location: FF_X31_Y15_N7
\r1_ps[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector1~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(6));

-- Location: IOIBUF_X33_Y12_N1
\data[5]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(5),
	o => \data[5]~input_o\);

-- Location: LCCOMB_X31_Y15_N4
\r2_ns[5]~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[5]~3_combout\ = (\state_ps.idle1~q\ & \data[5]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	datad => \data[5]~input_o\,
	combout => \r2_ns[5]~3_combout\);

-- Location: FF_X31_Y15_N5
\r2_ps[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[5]~3_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(5));

-- Location: LCCOMB_X31_Y15_N10
\Selector2~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector2~0_combout\ = (\state_ps.op~q\ & ((r2_ps(5)))) # (!\state_ps.op~q\ & (\data[5]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \data[5]~input_o\,
	datac => \state_ps.op~q\,
	datad => r2_ps(5),
	combout => \Selector2~0_combout\);

-- Location: FF_X31_Y15_N11
\r1_ps[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector2~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(5));

-- Location: IOIBUF_X31_Y0_N8
\data[4]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(4),
	o => \data[4]~input_o\);

-- Location: LCCOMB_X31_Y15_N16
\r2_ns[4]~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[4]~4_combout\ = (\state_ps.idle1~q\ & \data[4]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	datad => \data[4]~input_o\,
	combout => \r2_ns[4]~4_combout\);

-- Location: FF_X31_Y15_N17
\r2_ps[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[4]~4_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(4));

-- Location: LCCOMB_X31_Y15_N18
\Selector3~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector3~0_combout\ = (\state_ps.op~q\ & ((r2_ps(4)))) # (!\state_ps.op~q\ & (\data[4]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101011001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \data[4]~input_o\,
	datab => r2_ps(4),
	datac => \state_ps.op~q\,
	combout => \Selector3~0_combout\);

-- Location: FF_X31_Y15_N19
\r1_ps[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector3~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(4));

-- Location: IOIBUF_X33_Y10_N8
\data[3]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(3),
	o => \data[3]~input_o\);

-- Location: LCCOMB_X31_Y15_N24
\r2_ns[3]~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[3]~5_combout\ = (\state_ps.idle1~q\ & \data[3]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	datad => \data[3]~input_o\,
	combout => \r2_ns[3]~5_combout\);

-- Location: FF_X31_Y15_N25
\r2_ps[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[3]~5_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(3));

-- Location: LCCOMB_X31_Y15_N14
\Selector4~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector4~0_combout\ = (\state_ps.op~q\ & ((r2_ps(3)))) # (!\state_ps.op~q\ & (\data[3]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \data[3]~input_o\,
	datac => \state_ps.op~q\,
	datad => r2_ps(3),
	combout => \Selector4~0_combout\);

-- Location: FF_X31_Y15_N15
\r1_ps[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector4~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(3));

-- Location: IOIBUF_X33_Y15_N1
\data[2]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(2),
	o => \data[2]~input_o\);

-- Location: LCCOMB_X30_Y15_N30
\r2_ns[2]~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[2]~0_combout\ = (\data[2]~input_o\ & \state_ps.idle1~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \data[2]~input_o\,
	datad => \state_ps.idle1~q\,
	combout => \r2_ns[2]~0_combout\);

-- Location: FF_X30_Y15_N31
\r2_ps[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[2]~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(2));

-- Location: LCCOMB_X31_Y15_N8
\Selector5~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector5~0_combout\ = (\state_ps.op~q\ & ((r2_ps(2)))) # (!\state_ps.op~q\ & (\data[2]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101000001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \data[2]~input_o\,
	datac => \state_ps.op~q\,
	datad => r2_ps(2),
	combout => \Selector5~0_combout\);

-- Location: FF_X31_Y15_N9
\r1_ps[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector5~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(2));

-- Location: LCCOMB_X31_Y15_N2
\Selector6~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector6~0_combout\ = (\state_ps.op~q\ & ((r2_ps(1)))) # (!\state_ps.op~q\ & (\data[1]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \data[1]~input_o\,
	datac => \state_ps.op~q\,
	datad => r2_ps(1),
	combout => \Selector6~0_combout\);

-- Location: FF_X31_Y15_N3
\r1_ps[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector6~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(1));

-- Location: IOIBUF_X33_Y11_N1
\data[0]~input\ : cycloneiv_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_data(0),
	o => \data[0]~input_o\);

-- Location: LCCOMB_X31_Y15_N30
\r2_ns[0]~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \r2_ns[0]~7_combout\ = (\state_ps.idle1~q\ & \data[0]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.idle1~q\,
	datad => \data[0]~input_o\,
	combout => \r2_ns[0]~7_combout\);

-- Location: FF_X31_Y15_N31
\r2_ps[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \r2_ns[0]~7_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r2_ps(0));

-- Location: LCCOMB_X31_Y15_N12
\Selector7~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Selector7~0_combout\ = (\state_ps.op~q\ & (r2_ps(0))) # (!\state_ps.op~q\ & ((\data[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110010101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(0),
	datab => \data[0]~input_o\,
	datac => \state_ps.op~q\,
	combout => \Selector7~0_combout\);

-- Location: FF_X31_Y15_N13
\r1_ps[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Selector7~0_combout\,
	clrn => \ALT_INV_reset~inputclkctrl_outclk\,
	ena => \ALT_INV_state_ps.idle2~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => r1_ps(0));

-- Location: LCCOMB_X30_Y15_N12
\LessThan0~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~1_cout\ = CARRY((r2_ps(0) & !r1_ps(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000100010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(0),
	datab => r1_ps(0),
	datad => VCC,
	cout => \LessThan0~1_cout\);

-- Location: LCCOMB_X30_Y15_N14
\LessThan0~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~3_cout\ = CARRY((r1_ps(1) & ((!\LessThan0~1_cout\) # (!r2_ps(1)))) # (!r1_ps(1) & (!r2_ps(1) & !\LessThan0~1_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r1_ps(1),
	datab => r2_ps(1),
	datad => VCC,
	cin => \LessThan0~1_cout\,
	cout => \LessThan0~3_cout\);

-- Location: LCCOMB_X30_Y15_N16
\LessThan0~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~5_cout\ = CARRY((r2_ps(2) & ((!\LessThan0~3_cout\) # (!r1_ps(2)))) # (!r2_ps(2) & (!r1_ps(2) & !\LessThan0~3_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(2),
	datab => r1_ps(2),
	datad => VCC,
	cin => \LessThan0~3_cout\,
	cout => \LessThan0~5_cout\);

-- Location: LCCOMB_X30_Y15_N18
\LessThan0~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~7_cout\ = CARRY((r2_ps(3) & (r1_ps(3) & !\LessThan0~5_cout\)) # (!r2_ps(3) & ((r1_ps(3)) # (!\LessThan0~5_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(3),
	datab => r1_ps(3),
	datad => VCC,
	cin => \LessThan0~5_cout\,
	cout => \LessThan0~7_cout\);

-- Location: LCCOMB_X30_Y15_N20
\LessThan0~9\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~9_cout\ = CARRY((r2_ps(4) & ((!\LessThan0~7_cout\) # (!r1_ps(4)))) # (!r2_ps(4) & (!r1_ps(4) & !\LessThan0~7_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(4),
	datab => r1_ps(4),
	datad => VCC,
	cin => \LessThan0~7_cout\,
	cout => \LessThan0~9_cout\);

-- Location: LCCOMB_X30_Y15_N22
\LessThan0~11\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~11_cout\ = CARRY((r2_ps(5) & (r1_ps(5) & !\LessThan0~9_cout\)) # (!r2_ps(5) & ((r1_ps(5)) # (!\LessThan0~9_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(5),
	datab => r1_ps(5),
	datad => VCC,
	cin => \LessThan0~9_cout\,
	cout => \LessThan0~11_cout\);

-- Location: LCCOMB_X30_Y15_N24
\LessThan0~13\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~13_cout\ = CARRY((r1_ps(6) & (r2_ps(6) & !\LessThan0~11_cout\)) # (!r1_ps(6) & ((r2_ps(6)) # (!\LessThan0~11_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r1_ps(6),
	datab => r2_ps(6),
	datad => VCC,
	cin => \LessThan0~11_cout\,
	cout => \LessThan0~13_cout\);

-- Location: LCCOMB_X30_Y15_N26
\LessThan0~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan0~14_combout\ = (r2_ps(7) & ((\LessThan0~13_cout\) # (!r1_ps(7)))) # (!r2_ps(7) & (\LessThan0~13_cout\ & !r1_ps(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000011111010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => r2_ps(7),
	datad => r1_ps(7),
	cin => \LessThan0~13_cout\,
	combout => \LessThan0~14_combout\);

-- Location: LCCOMB_X30_Y16_N4
\max~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~2_combout\ = (\LessThan0~14_combout\ & (r2_ps(1))) # (!\LessThan0~14_combout\ & ((r1_ps(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => r2_ps(1),
	datac => \LessThan0~14_combout\,
	datad => r1_ps(1),
	combout => \max~2_combout\);

-- Location: LCCOMB_X30_Y15_N6
\max~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~1_combout\ = (\LessThan0~14_combout\ & ((r2_ps(0)))) # (!\LessThan0~14_combout\ & (r1_ps(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010011100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(0),
	datac => r2_ps(0),
	combout => \max~1_combout\);

-- Location: LCCOMB_X30_Y16_N8
\Add0~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~1_cout\ = CARRY(!\max~1_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000110011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \max~1_combout\,
	datad => VCC,
	cout => \Add0~1_cout\);

-- Location: LCCOMB_X30_Y16_N10
\Add0~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~2_combout\ = (\max~2_combout\ & ((\Add0~1_cout\) # (GND))) # (!\max~2_combout\ & (!\Add0~1_cout\))
-- \Add0~3\ = CARRY((\max~2_combout\) # (!\Add0~1_cout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001111001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \max~2_combout\,
	datad => VCC,
	cin => \Add0~1_cout\,
	combout => \Add0~2_combout\,
	cout => \Add0~3\);

-- Location: LCCOMB_X30_Y16_N6
\min~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~1_combout\ = (\LessThan0~14_combout\ & ((r1_ps(1)))) # (!\LessThan0~14_combout\ & (r2_ps(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => r2_ps(1),
	datac => \LessThan0~14_combout\,
	datad => r1_ps(1),
	combout => \min~1_combout\);

-- Location: LCCOMB_X30_Y15_N28
\min~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~2_combout\ = (\LessThan0~14_combout\ & (r1_ps(0))) # (!\LessThan0~14_combout\ & ((r2_ps(0))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(0),
	datac => r2_ps(0),
	combout => \min~2_combout\);

-- Location: LCCOMB_X31_Y16_N10
\Add1~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~1_cout\ = CARRY((\min~2_combout\ & \max~1_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \min~2_combout\,
	datab => \max~1_combout\,
	datad => VCC,
	cout => \Add1~1_cout\);

-- Location: LCCOMB_X31_Y16_N12
\Add1~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~2_combout\ = (\Add0~2_combout\ & ((\min~1_combout\ & (\Add1~1_cout\ & VCC)) # (!\min~1_combout\ & (!\Add1~1_cout\)))) # (!\Add0~2_combout\ & ((\min~1_combout\ & (!\Add1~1_cout\)) # (!\min~1_combout\ & ((\Add1~1_cout\) # (GND)))))
-- \Add1~3\ = CARRY((\Add0~2_combout\ & (!\min~1_combout\ & !\Add1~1_cout\)) # (!\Add0~2_combout\ & ((!\Add1~1_cout\) # (!\min~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~2_combout\,
	datab => \min~1_combout\,
	datad => VCC,
	cin => \Add1~1_cout\,
	combout => \Add1~2_combout\,
	cout => \Add1~3\);

-- Location: LCCOMB_X30_Y15_N10
\min~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~0_combout\ = (\LessThan0~14_combout\ & (r1_ps(2))) # (!\LessThan0~14_combout\ & ((r2_ps(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(2),
	datac => r2_ps(2),
	combout => \min~0_combout\);

-- Location: LCCOMB_X30_Y15_N8
\max~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~0_combout\ = (\LessThan0~14_combout\ & ((r2_ps(2)))) # (!\LessThan0~14_combout\ & (r1_ps(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010011100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(2),
	datac => r2_ps(2),
	combout => \max~0_combout\);

-- Location: LCCOMB_X30_Y16_N12
\Add0~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~4_combout\ = ((\max~0_combout\ $ (\max~1_combout\ $ (\Add0~3\)))) # (GND)
-- \Add0~5\ = CARRY((\max~0_combout\ & (\max~1_combout\ & !\Add0~3\)) # (!\max~0_combout\ & ((\max~1_combout\) # (!\Add0~3\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~0_combout\,
	datab => \max~1_combout\,
	datad => VCC,
	cin => \Add0~3\,
	combout => \Add0~4_combout\,
	cout => \Add0~5\);

-- Location: LCCOMB_X31_Y16_N14
\Add1~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~4_combout\ = ((\min~0_combout\ $ (\Add0~4_combout\ $ (!\Add1~3\)))) # (GND)
-- \Add1~5\ = CARRY((\min~0_combout\ & ((\Add0~4_combout\) # (!\Add1~3\))) # (!\min~0_combout\ & (\Add0~4_combout\ & !\Add1~3\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~0_combout\,
	datab => \Add0~4_combout\,
	datad => VCC,
	cin => \Add1~3\,
	combout => \Add1~4_combout\,
	cout => \Add1~5\);

-- Location: LCCOMB_X31_Y18_N8
\Add2~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~0_combout\ = (\Add1~2_combout\ & (\Add1~4_combout\ $ (VCC))) # (!\Add1~2_combout\ & (\Add1~4_combout\ & VCC))
-- \Add2~1\ = CARRY((\Add1~2_combout\ & \Add1~4_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add1~2_combout\,
	datab => \Add1~4_combout\,
	datad => VCC,
	combout => \Add2~0_combout\,
	cout => \Add2~1\);

-- Location: LCCOMB_X32_Y18_N0
\fil_output~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~1_combout\ = (\state_ps.op~q\ & \Add2~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.op~q\,
	datad => \Add2~0_combout\,
	combout => \fil_output~1_combout\);

-- Location: LCCOMB_X31_Y16_N2
\max~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~3_combout\ = (\LessThan0~14_combout\ & (r2_ps(3))) # (!\LessThan0~14_combout\ & ((r1_ps(3))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r2_ps(3),
	datac => r1_ps(3),
	combout => \max~3_combout\);

-- Location: LCCOMB_X30_Y16_N14
\Add0~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~6_combout\ = (\max~3_combout\ & ((\max~2_combout\ & (!\Add0~5\)) # (!\max~2_combout\ & ((\Add0~5\) # (GND))))) # (!\max~3_combout\ & ((\max~2_combout\ & (\Add0~5\ & VCC)) # (!\max~2_combout\ & (!\Add0~5\))))
-- \Add0~7\ = CARRY((\max~3_combout\ & ((!\Add0~5\) # (!\max~2_combout\))) # (!\max~3_combout\ & (!\max~2_combout\ & !\Add0~5\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~3_combout\,
	datab => \max~2_combout\,
	datad => VCC,
	cin => \Add0~5\,
	combout => \Add0~6_combout\,
	cout => \Add0~7\);

-- Location: LCCOMB_X31_Y16_N4
\min~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~3_combout\ = (\LessThan0~14_combout\ & ((r1_ps(3)))) # (!\LessThan0~14_combout\ & (r2_ps(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010011100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r2_ps(3),
	datac => r1_ps(3),
	combout => \min~3_combout\);

-- Location: LCCOMB_X31_Y16_N16
\Add1~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~6_combout\ = (\Add0~6_combout\ & ((\min~3_combout\ & (\Add1~5\ & VCC)) # (!\min~3_combout\ & (!\Add1~5\)))) # (!\Add0~6_combout\ & ((\min~3_combout\ & (!\Add1~5\)) # (!\min~3_combout\ & ((\Add1~5\) # (GND)))))
-- \Add1~7\ = CARRY((\Add0~6_combout\ & (!\min~3_combout\ & !\Add1~5\)) # (!\Add0~6_combout\ & ((!\Add1~5\) # (!\min~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~6_combout\,
	datab => \min~3_combout\,
	datad => VCC,
	cin => \Add1~5\,
	combout => \Add1~6_combout\,
	cout => \Add1~7\);

-- Location: LCCOMB_X31_Y18_N10
\Add2~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~2_combout\ = (\Add1~6_combout\ & (!\Add2~1\)) # (!\Add1~6_combout\ & ((\Add2~1\) # (GND)))
-- \Add2~3\ = CARRY((!\Add2~1\) # (!\Add1~6_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add1~6_combout\,
	datad => VCC,
	cin => \Add2~1\,
	combout => \Add2~2_combout\,
	cout => \Add2~3\);

-- Location: LCCOMB_X31_Y18_N24
\fil_output~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~2_combout\ = (\state_ps.op~q\ & \Add2~2_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \state_ps.op~q\,
	datad => \Add2~2_combout\,
	combout => \fil_output~2_combout\);

-- Location: LCCOMB_X31_Y16_N30
\max~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~4_combout\ = (\LessThan0~14_combout\ & ((r2_ps(4)))) # (!\LessThan0~14_combout\ & (r1_ps(4)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010011100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(4),
	datac => r2_ps(4),
	combout => \max~4_combout\);

-- Location: LCCOMB_X30_Y16_N16
\Add0~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~8_combout\ = ((\max~0_combout\ $ (\max~4_combout\ $ (\Add0~7\)))) # (GND)
-- \Add0~9\ = CARRY((\max~0_combout\ & ((!\Add0~7\) # (!\max~4_combout\))) # (!\max~0_combout\ & (!\max~4_combout\ & !\Add0~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~0_combout\,
	datab => \max~4_combout\,
	datad => VCC,
	cin => \Add0~7\,
	combout => \Add0~8_combout\,
	cout => \Add0~9\);

-- Location: LCCOMB_X31_Y16_N0
\min~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~4_combout\ = (\LessThan0~14_combout\ & (r1_ps(4))) # (!\LessThan0~14_combout\ & ((r2_ps(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datab => r1_ps(4),
	datac => r2_ps(4),
	combout => \min~4_combout\);

-- Location: LCCOMB_X31_Y16_N18
\Add1~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~8_combout\ = ((\Add0~8_combout\ $ (\min~4_combout\ $ (!\Add1~7\)))) # (GND)
-- \Add1~9\ = CARRY((\Add0~8_combout\ & ((\min~4_combout\) # (!\Add1~7\))) # (!\Add0~8_combout\ & (\min~4_combout\ & !\Add1~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~8_combout\,
	datab => \min~4_combout\,
	datad => VCC,
	cin => \Add1~7\,
	combout => \Add1~8_combout\,
	cout => \Add1~9\);

-- Location: LCCOMB_X31_Y18_N12
\Add2~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~4_combout\ = (\Add1~8_combout\ & (\Add2~3\ $ (GND))) # (!\Add1~8_combout\ & (!\Add2~3\ & VCC))
-- \Add2~5\ = CARRY((\Add1~8_combout\ & !\Add2~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add1~8_combout\,
	datad => VCC,
	cin => \Add2~3\,
	combout => \Add2~4_combout\,
	cout => \Add2~5\);

-- Location: LCCOMB_X31_Y18_N6
\fil_output~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~3_combout\ = (\state_ps.op~q\ & \Add2~4_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \state_ps.op~q\,
	datad => \Add2~4_combout\,
	combout => \fil_output~3_combout\);

-- Location: LCCOMB_X30_Y16_N2
\max~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~5_combout\ = (\LessThan0~14_combout\ & ((r2_ps(5)))) # (!\LessThan0~14_combout\ & (r1_ps(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datac => r1_ps(5),
	datad => r2_ps(5),
	combout => \max~5_combout\);

-- Location: LCCOMB_X30_Y16_N18
\Add0~10\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~10_combout\ = (\max~3_combout\ & ((\max~5_combout\ & (!\Add0~9\)) # (!\max~5_combout\ & (\Add0~9\ & VCC)))) # (!\max~3_combout\ & ((\max~5_combout\ & ((\Add0~9\) # (GND))) # (!\max~5_combout\ & (!\Add0~9\))))
-- \Add0~11\ = CARRY((\max~3_combout\ & (\max~5_combout\ & !\Add0~9\)) # (!\max~3_combout\ & ((\max~5_combout\) # (!\Add0~9\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100101001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~3_combout\,
	datab => \max~5_combout\,
	datad => VCC,
	cin => \Add0~9\,
	combout => \Add0~10_combout\,
	cout => \Add0~11\);

-- Location: LCCOMB_X30_Y16_N28
\min~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~5_combout\ = (\LessThan0~14_combout\ & (r1_ps(5))) # (!\LessThan0~14_combout\ & ((r2_ps(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datac => r1_ps(5),
	datad => r2_ps(5),
	combout => \min~5_combout\);

-- Location: LCCOMB_X31_Y16_N20
\Add1~10\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~10_combout\ = (\Add0~10_combout\ & ((\min~5_combout\ & (\Add1~9\ & VCC)) # (!\min~5_combout\ & (!\Add1~9\)))) # (!\Add0~10_combout\ & ((\min~5_combout\ & (!\Add1~9\)) # (!\min~5_combout\ & ((\Add1~9\) # (GND)))))
-- \Add1~11\ = CARRY((\Add0~10_combout\ & (!\min~5_combout\ & !\Add1~9\)) # (!\Add0~10_combout\ & ((!\Add1~9\) # (!\min~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~10_combout\,
	datab => \min~5_combout\,
	datad => VCC,
	cin => \Add1~9\,
	combout => \Add1~10_combout\,
	cout => \Add1~11\);

-- Location: LCCOMB_X31_Y18_N14
\Add2~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~6_combout\ = (\Add1~10_combout\ & (!\Add2~5\)) # (!\Add1~10_combout\ & ((\Add2~5\) # (GND)))
-- \Add2~7\ = CARRY((!\Add2~5\) # (!\Add1~10_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \Add1~10_combout\,
	datad => VCC,
	cin => \Add2~5\,
	combout => \Add2~6_combout\,
	cout => \Add2~7\);

-- Location: LCCOMB_X31_Y18_N4
\fil_output~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~4_combout\ = (\Add2~6_combout\ & \state_ps.op~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \Add2~6_combout\,
	datad => \state_ps.op~q\,
	combout => \fil_output~4_combout\);

-- Location: LCCOMB_X31_Y16_N8
\min~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~6_combout\ = (\LessThan0~14_combout\ & ((r1_ps(6)))) # (!\LessThan0~14_combout\ & (r2_ps(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datac => r2_ps(6),
	datad => r1_ps(6),
	combout => \min~6_combout\);

-- Location: LCCOMB_X31_Y16_N6
\max~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~6_combout\ = (\LessThan0~14_combout\ & (r2_ps(6))) # (!\LessThan0~14_combout\ & ((r1_ps(6))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan0~14_combout\,
	datac => r2_ps(6),
	datad => r1_ps(6),
	combout => \max~6_combout\);

-- Location: LCCOMB_X30_Y16_N20
\Add0~12\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~12_combout\ = ((\max~6_combout\ $ (\max~4_combout\ $ (\Add0~11\)))) # (GND)
-- \Add0~13\ = CARRY((\max~6_combout\ & (\max~4_combout\ & !\Add0~11\)) # (!\max~6_combout\ & ((\max~4_combout\) # (!\Add0~11\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~6_combout\,
	datab => \max~4_combout\,
	datad => VCC,
	cin => \Add0~11\,
	combout => \Add0~12_combout\,
	cout => \Add0~13\);

-- Location: LCCOMB_X31_Y16_N22
\Add1~12\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~12_combout\ = ((\min~6_combout\ $ (\Add0~12_combout\ $ (!\Add1~11\)))) # (GND)
-- \Add1~13\ = CARRY((\min~6_combout\ & ((\Add0~12_combout\) # (!\Add1~11\))) # (!\min~6_combout\ & (\Add0~12_combout\ & !\Add1~11\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~6_combout\,
	datab => \Add0~12_combout\,
	datad => VCC,
	cin => \Add1~11\,
	combout => \Add1~12_combout\,
	cout => \Add1~13\);

-- Location: LCCOMB_X31_Y18_N16
\Add2~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~8_combout\ = (\Add1~12_combout\ & (\Add2~7\ $ (GND))) # (!\Add1~12_combout\ & (!\Add2~7\ & VCC))
-- \Add2~9\ = CARRY((\Add1~12_combout\ & !\Add2~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add1~12_combout\,
	datad => VCC,
	cin => \Add2~7\,
	combout => \Add2~8_combout\,
	cout => \Add2~9\);

-- Location: LCCOMB_X32_Y18_N6
\fil_output~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~5_combout\ = (\state_ps.op~q\ & \Add2~8_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100000011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \state_ps.op~q\,
	datac => \Add2~8_combout\,
	combout => \fil_output~5_combout\);

-- Location: LCCOMB_X30_Y16_N0
\min~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \min~7_combout\ = (\LessThan0~14_combout\ & (r1_ps(7))) # (!\LessThan0~14_combout\ & ((r2_ps(7))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => r1_ps(7),
	datac => \LessThan0~14_combout\,
	datad => r2_ps(7),
	combout => \min~7_combout\);

-- Location: LCCOMB_X30_Y16_N30
\max~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \max~7_combout\ = (\LessThan0~14_combout\ & ((r2_ps(7)))) # (!\LessThan0~14_combout\ & (r1_ps(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => r1_ps(7),
	datac => \LessThan0~14_combout\,
	datad => r2_ps(7),
	combout => \max~7_combout\);

-- Location: LCCOMB_X30_Y16_N22
\Add0~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~14_combout\ = (\max~7_combout\ & ((\max~5_combout\ & (!\Add0~13\)) # (!\max~5_combout\ & ((\Add0~13\) # (GND))))) # (!\max~7_combout\ & ((\max~5_combout\ & (\Add0~13\ & VCC)) # (!\max~5_combout\ & (!\Add0~13\))))
-- \Add0~15\ = CARRY((\max~7_combout\ & ((!\Add0~13\) # (!\max~5_combout\))) # (!\max~7_combout\ & (!\max~5_combout\ & !\Add0~13\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~7_combout\,
	datab => \max~5_combout\,
	datad => VCC,
	cin => \Add0~13\,
	combout => \Add0~14_combout\,
	cout => \Add0~15\);

-- Location: LCCOMB_X31_Y16_N24
\Add1~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~14_combout\ = (\min~7_combout\ & ((\Add0~14_combout\ & (\Add1~13\ & VCC)) # (!\Add0~14_combout\ & (!\Add1~13\)))) # (!\min~7_combout\ & ((\Add0~14_combout\ & (!\Add1~13\)) # (!\Add0~14_combout\ & ((\Add1~13\) # (GND)))))
-- \Add1~15\ = CARRY((\min~7_combout\ & (!\Add0~14_combout\ & !\Add1~13\)) # (!\min~7_combout\ & ((!\Add1~13\) # (!\Add0~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~7_combout\,
	datab => \Add0~14_combout\,
	datad => VCC,
	cin => \Add1~13\,
	combout => \Add1~14_combout\,
	cout => \Add1~15\);

-- Location: LCCOMB_X31_Y18_N18
\Add2~10\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~10_combout\ = (\Add1~14_combout\ & (!\Add2~9\)) # (!\Add1~14_combout\ & ((\Add2~9\) # (GND)))
-- \Add2~11\ = CARRY((!\Add2~9\) # (!\Add1~14_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add1~14_combout\,
	datad => VCC,
	cin => \Add2~9\,
	combout => \Add2~10_combout\,
	cout => \Add2~11\);

-- Location: LCCOMB_X31_Y18_N26
\fil_output~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~6_combout\ = (\state_ps.op~q\ & \Add2~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \state_ps.op~q\,
	datad => \Add2~10_combout\,
	combout => \fil_output~6_combout\);

-- Location: LCCOMB_X30_Y16_N24
\Add0~16\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~16_combout\ = (\max~6_combout\ & ((GND) # (!\Add0~15\))) # (!\max~6_combout\ & (\Add0~15\ $ (GND)))
-- \Add0~17\ = CARRY((\max~6_combout\) # (!\Add0~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \max~6_combout\,
	datad => VCC,
	cin => \Add0~15\,
	combout => \Add0~16_combout\,
	cout => \Add0~17\);

-- Location: LCCOMB_X31_Y16_N26
\Add1~16\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~16_combout\ = (\Add0~16_combout\ & (\Add1~15\ $ (GND))) # (!\Add0~16_combout\ & (!\Add1~15\ & VCC))
-- \Add1~17\ = CARRY((\Add0~16_combout\ & !\Add1~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \Add0~16_combout\,
	datad => VCC,
	cin => \Add1~15\,
	combout => \Add1~16_combout\,
	cout => \Add1~17\);

-- Location: LCCOMB_X31_Y18_N20
\Add2~12\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~12_combout\ = (\Add1~16_combout\ & (\Add2~11\ $ (GND))) # (!\Add1~16_combout\ & (!\Add2~11\ & VCC))
-- \Add2~13\ = CARRY((\Add1~16_combout\ & !\Add2~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \Add1~16_combout\,
	datad => VCC,
	cin => \Add2~11\,
	combout => \Add2~12_combout\,
	cout => \Add2~13\);

-- Location: LCCOMB_X31_Y18_N0
\fil_output~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~7_combout\ = (\state_ps.op~q\ & \Add2~12_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \state_ps.op~q\,
	datad => \Add2~12_combout\,
	combout => \fil_output~7_combout\);

-- Location: LCCOMB_X30_Y16_N26
\Add0~18\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add0~18_combout\ = \max~7_combout\ $ (!\Add0~17\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010110100101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~7_combout\,
	cin => \Add0~17\,
	combout => \Add0~18_combout\);

-- Location: LCCOMB_X31_Y16_N28
\Add1~18\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add1~18_combout\ = \Add0~18_combout\ $ (\Add1~17\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~18_combout\,
	cin => \Add1~17\,
	combout => \Add1~18_combout\);

-- Location: LCCOMB_X31_Y18_N22
\Add2~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add2~14_combout\ = \Add1~18_combout\ $ (\Add2~13\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \Add1~18_combout\,
	cin => \Add2~13\,
	combout => \Add2~14_combout\);

-- Location: LCCOMB_X31_Y18_N2
\fil_output~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \fil_output~8_combout\ = (\Add2~14_combout\ & \state_ps.op~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \Add2~14_combout\,
	datad => \state_ps.op~q\,
	combout => \fil_output~8_combout\);

-- Location: LCCOMB_X31_Y17_N0
\Add3~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~0_combout\ = (\max~1_combout\ & (\min~2_combout\ $ (VCC))) # (!\max~1_combout\ & (\min~2_combout\ & VCC))
-- \Add3~1\ = CARRY((\max~1_combout\ & \min~2_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \max~1_combout\,
	datab => \min~2_combout\,
	datad => VCC,
	combout => \Add3~0_combout\,
	cout => \Add3~1\);

-- Location: LCCOMB_X32_Y14_N8
\Add5~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~0_combout\ = (\state_ps.op~q\ & \Add3~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \state_ps.op~q\,
	datad => \Add3~0_combout\,
	combout => \Add5~0_combout\);

-- Location: LCCOMB_X31_Y17_N2
\Add3~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~2_combout\ = (\max~2_combout\ & ((\min~1_combout\ & (\Add3~1\ & VCC)) # (!\min~1_combout\ & (!\Add3~1\)))) # (!\max~2_combout\ & ((\min~1_combout\ & (!\Add3~1\)) # (!\min~1_combout\ & ((\Add3~1\) # (GND)))))
-- \Add3~3\ = CARRY((\max~2_combout\ & (!\min~1_combout\ & !\Add3~1\)) # (!\max~2_combout\ & ((!\Add3~1\) # (!\min~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~2_combout\,
	datab => \min~1_combout\,
	datad => VCC,
	cin => \Add3~1\,
	combout => \Add3~2_combout\,
	cout => \Add3~3\);

-- Location: LCCOMB_X31_Y17_N18
\Add5~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~2_cout\ = CARRY(!\Add3~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000110011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Add3~0_combout\,
	datad => VCC,
	cout => \Add5~2_cout\);

-- Location: LCCOMB_X31_Y17_N20
\Add5~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~3_combout\ = (\Add2~0_combout\ & ((\Add3~2_combout\ & (!\Add5~2_cout\)) # (!\Add3~2_combout\ & (\Add5~2_cout\ & VCC)))) # (!\Add2~0_combout\ & ((\Add3~2_combout\ & ((\Add5~2_cout\) # (GND))) # (!\Add3~2_combout\ & (!\Add5~2_cout\))))
-- \Add5~4\ = CARRY((\Add2~0_combout\ & (\Add3~2_combout\ & !\Add5~2_cout\)) # (!\Add2~0_combout\ & ((\Add3~2_combout\) # (!\Add5~2_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100101001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~0_combout\,
	datab => \Add3~2_combout\,
	datad => VCC,
	cin => \Add5~2_cout\,
	combout => \Add5~3_combout\,
	cout => \Add5~4\);

-- Location: LCCOMB_X31_Y17_N4
\Add3~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~4_combout\ = ((\max~0_combout\ $ (\min~0_combout\ $ (!\Add3~3\)))) # (GND)
-- \Add3~5\ = CARRY((\max~0_combout\ & ((\min~0_combout\) # (!\Add3~3\))) # (!\max~0_combout\ & (\min~0_combout\ & !\Add3~3\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~0_combout\,
	datab => \min~0_combout\,
	datad => VCC,
	cin => \Add3~3\,
	combout => \Add3~4_combout\,
	cout => \Add3~5\);

-- Location: LCCOMB_X31_Y17_N6
\Add3~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~6_combout\ = (\min~3_combout\ & ((\max~3_combout\ & (\Add3~5\ & VCC)) # (!\max~3_combout\ & (!\Add3~5\)))) # (!\min~3_combout\ & ((\max~3_combout\ & (!\Add3~5\)) # (!\max~3_combout\ & ((\Add3~5\) # (GND)))))
-- \Add3~7\ = CARRY((\min~3_combout\ & (!\max~3_combout\ & !\Add3~5\)) # (!\min~3_combout\ & ((!\Add3~5\) # (!\max~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~3_combout\,
	datab => \max~3_combout\,
	datad => VCC,
	cin => \Add3~5\,
	combout => \Add3~6_combout\,
	cout => \Add3~7\);

-- Location: LCCOMB_X31_Y17_N8
\Add3~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~8_combout\ = ((\max~4_combout\ $ (\min~4_combout\ $ (!\Add3~7\)))) # (GND)
-- \Add3~9\ = CARRY((\max~4_combout\ & ((\min~4_combout\) # (!\Add3~7\))) # (!\max~4_combout\ & (\min~4_combout\ & !\Add3~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~4_combout\,
	datab => \min~4_combout\,
	datad => VCC,
	cin => \Add3~7\,
	combout => \Add3~8_combout\,
	cout => \Add3~9\);

-- Location: LCCOMB_X31_Y17_N10
\Add3~10\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~10_combout\ = (\max~5_combout\ & ((\min~5_combout\ & (\Add3~9\ & VCC)) # (!\min~5_combout\ & (!\Add3~9\)))) # (!\max~5_combout\ & ((\min~5_combout\ & (!\Add3~9\)) # (!\min~5_combout\ & ((\Add3~9\) # (GND)))))
-- \Add3~11\ = CARRY((\max~5_combout\ & (!\min~5_combout\ & !\Add3~9\)) # (!\max~5_combout\ & ((!\Add3~9\) # (!\min~5_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \max~5_combout\,
	datab => \min~5_combout\,
	datad => VCC,
	cin => \Add3~9\,
	combout => \Add3~10_combout\,
	cout => \Add3~11\);

-- Location: LCCOMB_X31_Y17_N12
\Add3~12\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~12_combout\ = ((\min~6_combout\ $ (\max~6_combout\ $ (!\Add3~11\)))) # (GND)
-- \Add3~13\ = CARRY((\min~6_combout\ & ((\max~6_combout\) # (!\Add3~11\))) # (!\min~6_combout\ & (\max~6_combout\ & !\Add3~11\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~6_combout\,
	datab => \max~6_combout\,
	datad => VCC,
	cin => \Add3~11\,
	combout => \Add3~12_combout\,
	cout => \Add3~13\);

-- Location: LCCOMB_X31_Y17_N14
\Add3~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~14_combout\ = (\min~7_combout\ & ((\max~7_combout\ & (\Add3~13\ & VCC)) # (!\max~7_combout\ & (!\Add3~13\)))) # (!\min~7_combout\ & ((\max~7_combout\ & (!\Add3~13\)) # (!\max~7_combout\ & ((\Add3~13\) # (GND)))))
-- \Add3~15\ = CARRY((\min~7_combout\ & (!\max~7_combout\ & !\Add3~13\)) # (!\min~7_combout\ & ((!\Add3~13\) # (!\max~7_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \min~7_combout\,
	datab => \max~7_combout\,
	datad => VCC,
	cin => \Add3~13\,
	combout => \Add3~14_combout\,
	cout => \Add3~15\);

-- Location: LCCOMB_X31_Y17_N16
\Add3~16\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add3~16_combout\ = !\Add3~15\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	cin => \Add3~15\,
	combout => \Add3~16_combout\);

-- Location: LCCOMB_X32_Y17_N14
\LessThan1~1\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~1_cout\ = CARRY(\Add3~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~0_combout\,
	datad => VCC,
	cout => \LessThan1~1_cout\);

-- Location: LCCOMB_X32_Y17_N16
\LessThan1~3\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~3_cout\ = CARRY((\Add3~2_combout\ & (\Add2~0_combout\ & !\LessThan1~1_cout\)) # (!\Add3~2_combout\ & ((\Add2~0_combout\) # (!\LessThan1~1_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~2_combout\,
	datab => \Add2~0_combout\,
	datad => VCC,
	cin => \LessThan1~1_cout\,
	cout => \LessThan1~3_cout\);

-- Location: LCCOMB_X32_Y17_N18
\LessThan1~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~5_cout\ = CARRY((\Add2~2_combout\ & (\Add3~4_combout\ & !\LessThan1~3_cout\)) # (!\Add2~2_combout\ & ((\Add3~4_combout\) # (!\LessThan1~3_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~2_combout\,
	datab => \Add3~4_combout\,
	datad => VCC,
	cin => \LessThan1~3_cout\,
	cout => \LessThan1~5_cout\);

-- Location: LCCOMB_X32_Y17_N20
\LessThan1~7\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~7_cout\ = CARRY((\Add2~4_combout\ & ((!\LessThan1~5_cout\) # (!\Add3~6_combout\))) # (!\Add2~4_combout\ & (!\Add3~6_combout\ & !\LessThan1~5_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~4_combout\,
	datab => \Add3~6_combout\,
	datad => VCC,
	cin => \LessThan1~5_cout\,
	cout => \LessThan1~7_cout\);

-- Location: LCCOMB_X32_Y17_N22
\LessThan1~9\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~9_cout\ = CARRY((\Add2~6_combout\ & (\Add3~8_combout\ & !\LessThan1~7_cout\)) # (!\Add2~6_combout\ & ((\Add3~8_combout\) # (!\LessThan1~7_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~6_combout\,
	datab => \Add3~8_combout\,
	datad => VCC,
	cin => \LessThan1~7_cout\,
	cout => \LessThan1~9_cout\);

-- Location: LCCOMB_X32_Y17_N24
\LessThan1~11\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~11_cout\ = CARRY((\Add3~10_combout\ & (\Add2~8_combout\ & !\LessThan1~9_cout\)) # (!\Add3~10_combout\ & ((\Add2~8_combout\) # (!\LessThan1~9_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~10_combout\,
	datab => \Add2~8_combout\,
	datad => VCC,
	cin => \LessThan1~9_cout\,
	cout => \LessThan1~11_cout\);

-- Location: LCCOMB_X32_Y17_N26
\LessThan1~13\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~13_cout\ = CARRY((\Add3~12_combout\ & ((!\LessThan1~11_cout\) # (!\Add2~10_combout\))) # (!\Add3~12_combout\ & (!\Add2~10_combout\ & !\LessThan1~11_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~12_combout\,
	datab => \Add2~10_combout\,
	datad => VCC,
	cin => \LessThan1~11_cout\,
	cout => \LessThan1~13_cout\);

-- Location: LCCOMB_X32_Y17_N28
\LessThan1~15\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~15_cout\ = CARRY((\Add3~14_combout\ & (\Add2~12_combout\ & !\LessThan1~13_cout\)) # (!\Add3~14_combout\ & ((\Add2~12_combout\) # (!\LessThan1~13_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~14_combout\,
	datab => \Add2~12_combout\,
	datad => VCC,
	cin => \LessThan1~13_cout\,
	cout => \LessThan1~15_cout\);

-- Location: LCCOMB_X32_Y17_N30
\LessThan1~16\ : cycloneiv_lcell_comb
-- Equation(s):
-- \LessThan1~16_combout\ = (\Add3~16_combout\ & ((!\Add2~14_combout\) # (!\LessThan1~15_cout\))) # (!\Add3~16_combout\ & (!\LessThan1~15_cout\ & !\Add2~14_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~16_combout\,
	datad => \Add2~14_combout\,
	cin => \LessThan1~15_cout\,
	combout => \LessThan1~16_combout\);

-- Location: LCCOMB_X32_Y17_N0
\Add4~0\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~0_combout\ = (\Add3~2_combout\ & ((GND) # (!\Add2~0_combout\))) # (!\Add3~2_combout\ & (\Add2~0_combout\ $ (GND)))
-- \Add4~1\ = CARRY((\Add3~2_combout\) # (!\Add2~0_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010111011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~2_combout\,
	datab => \Add2~0_combout\,
	datad => VCC,
	combout => \Add4~0_combout\,
	cout => \Add4~1\);

-- Location: LCCOMB_X32_Y18_N4
\Add5~5\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~5_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & ((\Add4~0_combout\))) # (!\LessThan1~16_combout\ & (\Add5~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add5~3_combout\,
	datab => \state_ps.op~q\,
	datac => \LessThan1~16_combout\,
	datad => \Add4~0_combout\,
	combout => \Add5~5_combout\);

-- Location: LCCOMB_X31_Y17_N22
\Add5~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~6_combout\ = ((\Add3~4_combout\ $ (\Add2~2_combout\ $ (\Add5~4\)))) # (GND)
-- \Add5~7\ = CARRY((\Add3~4_combout\ & (\Add2~2_combout\ & !\Add5~4\)) # (!\Add3~4_combout\ & ((\Add2~2_combout\) # (!\Add5~4\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~4_combout\,
	datab => \Add2~2_combout\,
	datad => VCC,
	cin => \Add5~4\,
	combout => \Add5~6_combout\,
	cout => \Add5~7\);

-- Location: LCCOMB_X32_Y17_N2
\Add4~2\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~2_combout\ = (\Add2~2_combout\ & ((\Add3~4_combout\ & (!\Add4~1\)) # (!\Add3~4_combout\ & ((\Add4~1\) # (GND))))) # (!\Add2~2_combout\ & ((\Add3~4_combout\ & (\Add4~1\ & VCC)) # (!\Add3~4_combout\ & (!\Add4~1\))))
-- \Add4~3\ = CARRY((\Add2~2_combout\ & ((!\Add4~1\) # (!\Add3~4_combout\))) # (!\Add2~2_combout\ & (!\Add3~4_combout\ & !\Add4~1\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~2_combout\,
	datab => \Add3~4_combout\,
	datad => VCC,
	cin => \Add4~1\,
	combout => \Add4~2_combout\,
	cout => \Add4~3\);

-- Location: LCCOMB_X32_Y18_N18
\Add5~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~8_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & ((\Add4~2_combout\))) # (!\LessThan1~16_combout\ & (\Add5~6_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add5~6_combout\,
	datab => \state_ps.op~q\,
	datac => \LessThan1~16_combout\,
	datad => \Add4~2_combout\,
	combout => \Add5~8_combout\);

-- Location: LCCOMB_X32_Y17_N4
\Add4~4\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~4_combout\ = ((\Add2~4_combout\ $ (\Add3~6_combout\ $ (\Add4~3\)))) # (GND)
-- \Add4~5\ = CARRY((\Add2~4_combout\ & (\Add3~6_combout\ & !\Add4~3\)) # (!\Add2~4_combout\ & ((\Add3~6_combout\) # (!\Add4~3\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~4_combout\,
	datab => \Add3~6_combout\,
	datad => VCC,
	cin => \Add4~3\,
	combout => \Add4~4_combout\,
	cout => \Add4~5\);

-- Location: LCCOMB_X31_Y17_N24
\Add5~9\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~9_combout\ = (\Add3~6_combout\ & ((\Add2~4_combout\ & (!\Add5~7\)) # (!\Add2~4_combout\ & ((\Add5~7\) # (GND))))) # (!\Add3~6_combout\ & ((\Add2~4_combout\ & (\Add5~7\ & VCC)) # (!\Add2~4_combout\ & (!\Add5~7\))))
-- \Add5~10\ = CARRY((\Add3~6_combout\ & ((!\Add5~7\) # (!\Add2~4_combout\))) # (!\Add3~6_combout\ & (!\Add2~4_combout\ & !\Add5~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~6_combout\,
	datab => \Add2~4_combout\,
	datad => VCC,
	cin => \Add5~7\,
	combout => \Add5~9_combout\,
	cout => \Add5~10\);

-- Location: LCCOMB_X32_Y18_N12
\Add5~11\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~11_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & (\Add4~4_combout\)) # (!\LessThan1~16_combout\ & ((\Add5~9_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000110010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add4~4_combout\,
	datab => \state_ps.op~q\,
	datac => \LessThan1~16_combout\,
	datad => \Add5~9_combout\,
	combout => \Add5~11_combout\);

-- Location: LCCOMB_X31_Y17_N26
\Add5~12\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~12_combout\ = ((\Add3~8_combout\ $ (\Add2~6_combout\ $ (\Add5~10\)))) # (GND)
-- \Add5~13\ = CARRY((\Add3~8_combout\ & (\Add2~6_combout\ & !\Add5~10\)) # (!\Add3~8_combout\ & ((\Add2~6_combout\) # (!\Add5~10\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~8_combout\,
	datab => \Add2~6_combout\,
	datad => VCC,
	cin => \Add5~10\,
	combout => \Add5~12_combout\,
	cout => \Add5~13\);

-- Location: LCCOMB_X32_Y17_N6
\Add4~6\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~6_combout\ = (\Add2~6_combout\ & ((\Add3~8_combout\ & (!\Add4~5\)) # (!\Add3~8_combout\ & ((\Add4~5\) # (GND))))) # (!\Add2~6_combout\ & ((\Add3~8_combout\ & (\Add4~5\ & VCC)) # (!\Add3~8_combout\ & (!\Add4~5\))))
-- \Add4~7\ = CARRY((\Add2~6_combout\ & ((!\Add4~5\) # (!\Add3~8_combout\))) # (!\Add2~6_combout\ & (!\Add3~8_combout\ & !\Add4~5\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~6_combout\,
	datab => \Add3~8_combout\,
	datad => VCC,
	cin => \Add4~5\,
	combout => \Add4~6_combout\,
	cout => \Add4~7\);

-- Location: LCCOMB_X32_Y18_N10
\Add5~14\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~14_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & ((\Add4~6_combout\))) # (!\LessThan1~16_combout\ & (\Add5~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan1~16_combout\,
	datab => \state_ps.op~q\,
	datac => \Add5~12_combout\,
	datad => \Add4~6_combout\,
	combout => \Add5~14_combout\);

-- Location: LCCOMB_X31_Y17_N28
\Add5~15\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~15_combout\ = (\Add3~10_combout\ & ((\Add2~8_combout\ & (!\Add5~13\)) # (!\Add2~8_combout\ & ((\Add5~13\) # (GND))))) # (!\Add3~10_combout\ & ((\Add2~8_combout\ & (\Add5~13\ & VCC)) # (!\Add2~8_combout\ & (!\Add5~13\))))
-- \Add5~16\ = CARRY((\Add3~10_combout\ & ((!\Add5~13\) # (!\Add2~8_combout\))) # (!\Add3~10_combout\ & (!\Add2~8_combout\ & !\Add5~13\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100100101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~10_combout\,
	datab => \Add2~8_combout\,
	datad => VCC,
	cin => \Add5~13\,
	combout => \Add5~15_combout\,
	cout => \Add5~16\);

-- Location: LCCOMB_X32_Y17_N8
\Add4~8\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~8_combout\ = ((\Add3~10_combout\ $ (\Add2~8_combout\ $ (\Add4~7\)))) # (GND)
-- \Add4~9\ = CARRY((\Add3~10_combout\ & ((!\Add4~7\) # (!\Add2~8_combout\))) # (!\Add3~10_combout\ & (!\Add2~8_combout\ & !\Add4~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~10_combout\,
	datab => \Add2~8_combout\,
	datad => VCC,
	cin => \Add4~7\,
	combout => \Add4~8_combout\,
	cout => \Add4~9\);

-- Location: LCCOMB_X32_Y17_N12
\Add5~17\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~17_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & ((\Add4~8_combout\))) # (!\LessThan1~16_combout\ & (\Add5~15_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add5~15_combout\,
	datab => \Add4~8_combout\,
	datac => \LessThan1~16_combout\,
	datad => \state_ps.op~q\,
	combout => \Add5~17_combout\);

-- Location: LCCOMB_X31_Y17_N30
\Add5~18\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~18_combout\ = \Add3~12_combout\ $ (\Add2~10_combout\ $ (\Add5~16\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011010010110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~12_combout\,
	datab => \Add2~10_combout\,
	cin => \Add5~16\,
	combout => \Add5~18_combout\);

-- Location: LCCOMB_X32_Y17_N10
\Add4~10\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add4~10_combout\ = \Add3~12_combout\ $ (\Add2~10_combout\ $ (!\Add4~9\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100101101001",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \Add3~12_combout\,
	datab => \Add2~10_combout\,
	cin => \Add4~9\,
	combout => \Add4~10_combout\);

-- Location: LCCOMB_X32_Y18_N16
\Add5~20\ : cycloneiv_lcell_comb
-- Equation(s):
-- \Add5~20_combout\ = (\state_ps.op~q\ & ((\LessThan1~16_combout\ & ((\Add4~10_combout\))) # (!\LessThan1~16_combout\ & (\Add5~18_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add5~18_combout\,
	datab => \state_ps.op~q\,
	datac => \LessThan1~16_combout\,
	datad => \Add4~10_combout\,
	combout => \Add5~20_combout\);

ww_fil_output(0) <= \fil_output[0]~output_o\;

ww_fil_output(1) <= \fil_output[1]~output_o\;

ww_fil_output(2) <= \fil_output[2]~output_o\;

ww_fil_output(3) <= \fil_output[3]~output_o\;

ww_fil_output(4) <= \fil_output[4]~output_o\;

ww_fil_output(5) <= \fil_output[5]~output_o\;

ww_fil_output(6) <= \fil_output[6]~output_o\;

ww_fil_output(7) <= \fil_output[7]~output_o\;

ww_error(0) <= \error[0]~output_o\;

ww_error(1) <= \error[1]~output_o\;

ww_error(2) <= \error[2]~output_o\;

ww_error(3) <= \error[3]~output_o\;

ww_error(4) <= \error[4]~output_o\;

ww_error(5) <= \error[5]~output_o\;

ww_error(6) <= \error[6]~output_o\;

ww_error(7) <= \error[7]~output_o\;
END structure;


